Renesas R0E572110CFK00 Informações Técnicas descarregar pdf (Página 87)

AN(7:0) AN(7:0)

DALC112S1

AVcc

User system

ASEBCK

ASEBRK

ASEBCK

N.C.

LVC244

ASEBRK

N.C.

EP1K100FC

SH7211

DA(1:0)

Figure 4.6 User System Interface Circuits

4.2 Delay Time for the User System Interface

Since the _RES and NMI signals are connected to the user system via the logic on the EV-chip

unit, a delay time shown in table 4.1 will be generated until the signal is input from the user

system to the MCU.

Table 4.1 Delay Time for Signals via the EV-chip Unit

No. Signal Name Delay Time (ns)

1 _RES 18

2 NMI 17

1 2 ... 82 83 84 85 86 87 88 89 90 91 92

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