
SH7145F
Synchronous Serial Data Transmission
REJ06B0352-0100O/Rev.1.00 March 2004 Page 6 of 16
3. Operation
Figure 3 shows the operation of synchronous mode data transmission in the task example. To help
explain figure 3, table 2 lists the software and hardware processing that is performed.
TDR_0
(register)
TSR_0
(register)
TDRE
(SSR_0 bit)
(1)
(2)
(3)
(4) (5)
(6)
(7)
(8)
Data bits D0 to D7
2nd byte
Data bits D0 to D7
1st byte
Figure 3 Data Transmission Operation
Table 2 Processing
Software Processing Hardware Processing
(1) Write transmit data to TDR_0 —
(2) Clear TDRE flag in SSR_0 to 0 —
(3) — TransferdatafromTDR_0toTSR_0
(4) — Set TDRE flag in SSR_0 to 0 and output
transmit data from pin TXD0
(5) Confirm TDRE is 0 and send next
transmit data to TDR_0
—
(6) Clear TDRE flag in SSR_0 to 0
(7) — TransferdatafromTDR_0toTSR_0
(8) — When output of previous data finishes, set
TDRE flag in SSR_0 to 1 and output
transfer data from pin TXD0
(9) Repeat Repeat
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