Renesas FP-80B Manual do Utilizador

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Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
To all our customers
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Resumo do Conteúdo

Página 1 - To all our customers

Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp.The semiconductor operati

Página 2 - Cautions

HD404818 Series8LCD Driver/ControllerV1, V2, V3: Power supply pins for the LCD driver. Since the LCD driving resistors are provided internally,no line

Página 3

HD404818 Series98Cautions1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark,

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HD404818 Series9Block DiagramInternal address busSystem control circuitRAM(1,184 4 bits)×W (2 bits)X (4 bits)SPX (4 bits)Y (4 bits)SPY (4 bits)CA(

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HD404818 Series10Memory MapROM Memory MapThe ROM is described in the following paragraphs with the ROM memory map in figure 1.015166364409540968191819

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HD404818 Series11RAM Memory MapThe MCU also contains a 1,184-digit × 4-bit RAM as the data and stack area. In addition to these areas,interrupt contro

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HD404818 Series120$000 $0006364801129599601023$03F$040$050$070$3FF4567012312131415891011161732354818192049505163$001$002$003$004$005$006$007$008$009$0

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HD404818 Series130123Bit 3 Bit 2 Bit 1 Bit 0IM0(IM of INT )0IF0(IF of INT )0RSP(Reset SP bit)IE(Interrupt enable flag)IMTA(IM of timer A)IFTA(IF of

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HD404818 Series14PC to PC :ST:CA:13 0Memory registers Stack area64 $040 960 $3C065 $04166 $04267 $04368 $04469 $04570 $04671 $04772 $04873 $04974

Página 10 - HD404818 Series

HD404818 Series15Functional DescriptionRegisters and FlagsThe MCU provides ten registers and two flags for CPU operations. They are illustrated in fig

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HD404818 Series16V Register (V): The V register, available for RAM address expansion, selects the bank of locations $100–$2CF on the RAM address (464

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HD404818 Series17ResetSetting the RESET pin high resets the MCU. At power-on or when cancelling the stop mode for theoscillator, apply the reset input

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Cautions Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products bett

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HD404818 Series18Table 1 Initial Values after MCU Reset (cont)Items Initial Value ContentsLCD LCD control register (LCR) 000 Refer to description of

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HD404818 Series19InterruptsSix interrupt sources are available on the MCU: external requests (INT0, INT1), timer/counters (timers A,B, and C), and the

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HD404818 Series20IEIF0IM0IF1IM1IFTAIMTAIFTBIMTBIFTCIMTCIFSIMS$ 000,0$ 000,2$ 000,3$ 001,0$ 001,1$ 001,2$ 001,3$ 002,0$ 002,1$ 002,2$ 002,3$ 003,0$ 003

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HD404818 Series21Table 3 Interrupt ConditionsInterrupt SourceInterrupt Control Bit INT0INT1Timer A Timer B Timer C SerialIE 111111IF0 • IM0 100000IF

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HD404818 Series22PoweronRESET = 1 ?Reset MCUInterruptrequest ?Execute instructionPC (PC) + 1←PC $0002←PC $0004←PC $0006←PC $0008←PC

Página 19

HD404818 Series23Interrupt Enable Flag (IE: $000, Bit 0): The interrupt enable flag enables/disables interrupt requests(table 4). It is reset by an i

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HD404818 Series24Table 7 Timer A Interrupt Request FlagIFTA Interrupt Request0No1 YesTimer A Interrupt Mask (IMTA: $001, Bit 3): The timer A interru

Página 21

HD404818 Series25Timer C Interrupt Mask (IMTC: $002, Bit 3): The timer C interrupt mask prevents the interrupt frombeing generated by the timer C inte

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HD404818 Series26Operating ModesThe MCU has five operating modes that are specified by how the clock is used. The functions available ineach mode are

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HD404818 Series27Table 16 Operations in Low-Power Dissipation ModesFunction Stop Mode Watch Mode Standby Mode Subactive Mode*2CPU Reset Retained Ret

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HD404818 Series4-Bit Single-Chip MicrocomputerPreliminaryRev. 2.0Sept. 1998DescriptionT he H D4 04 81 8 Se ri es of 4-bit single-chip HMCS400 ser

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HD404818 Series28Resetf :f : : : : CPU CLK PEROSCXOperatingOperatingStoppedffcyccycf :f : : :

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HD404818 Series29the next instruction after the SBY instruction. If the interrupt enable flag is 1, that interrupt is thenprocessed; if it is 0, the i

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HD404818 Series30Stop Mode: The MCU enters stop mode if the STOP instruction is executed in active mode when TMA3 =0. In this mode, the system oscilla

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HD404818 Series31Active mode Watch mode Active modeOscillationstabilization periodInterrupt strobeINT0 Interrupt requestgeneration(During the transiti

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HD404818 Series32MIS2 MIS1 MIS0tRCselectionRefer to table 20MIS: $00CMIS1 Bit 0 Bit00011011T0.24414 ms15.625 ms62.5 msNot used—0.12207 ms0.24414 ms7.

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HD404818 Series33The low-power mode operation sequence is shown in figure 17. With the IE flag cleared and an interruptflag set together with its inte

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HD404818 Series34MCU operationcycleIF = 1 ?InstructionexecutionSBY/STOPinstruction ?PC nextlocationPC vector addressLow-power modeoperation cy

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HD404818 Series35Low-power modeoperation cycleIF = 1 andIM = 0 ?Hardware NOPexecution←PC nextIocationMCU operationcycleStandby/watchmodeIF = 1 and

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HD404818 Series36• When the MCU is in watch mode or subactive mode, if the high level period before the falling edge ofINT0 is shorter than the inter

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HD404818 Series37Internal Oscillator CircuitFigure 20 shows the block diagram of the internal oscillator circuit. A ceramic oscillator can be connecte

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HD404818 Series2• Subroutine stack up to 16 levels, including interrupts• Instruction cycle time: 1 µs (fOSC = 4 MHz for HD404812/HD404814/HD404816

Página 36

HD404818 Series38Table 18 Examples of Oscillator CircuitsCircuit Configuration Circuit ConstantsExternal clock operationOscillatorOSCOpen1OSC2Cerami

Página 37

HD404818 Series39Table 18 Examples of Oscillator Circuits (cont)Circuit Configuration Circuit ConstantsCrystal oscillatorX1C12CX2CrystalGNDLSCRSC0Cr

Página 38

HD404818 Series40Input/OutputThe MCU provides 26 I/O pins and 4 input-only pins including 10 high-current pins (15 mA max.).Twenty-six I/O pins contai

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HD404818 Series41Table 19 I/O Pin Circuit TypesI/O Pins Circuit Pin NameI/O common pins(wint pull-up MOS)VCCVCCInput control signalInput dataOutput

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HD404818 Series42D Port: Consists of ten 1-bit I/O ports and four input ports. Pins D0 to D9 are high-current I/O pins (15 mAmax.). The sum of the cur

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HD404818 Series43MPXPinComparator–+VCrefMode registerInternal busFigure 22 Configuration of D12 and D13

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HD404818 Series44PMRA (port mode register A) ADR: $0043210R0 /SO pin mode selection2R0 /SI pin mode selection1R3 /INT pin mode selection2R3

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HD404818 Series45Table 20 Input/Output by Program ControlPMRB Bit 3 0 1DCR0101PDR 01010101PMOS (A) — — — On — — — OnNMOS (B) — — On — — — On —Pull-u

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HD404818 Series46PMRB3Input control signalVCCPull-upMOSDCRPDRInput dataNMOS (B)PMOS (A)VCCFigure 24 Configuration of the Input/Output Buffer

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HD404818 Series47TimersThe MCU provides prescalers S and W (each with a different input clock source), and three timer/ counters(timers A, B, and C).

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HD404818 Series3Ordering InformationTypeSupplyVoltageProductName Model Name ROM (Word)ClockFrequency PackageMask ROM Standard(4.0 to 6.0 V)HD404812 HD

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HD404818 Series481/4 1/232.768-kHz oscillatorSystem clockPrescaler W(PSW)SelectorSelectorPrescaler S (PSS)SelectorInternal data busTimer A interruptre

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HD404818 Series49Timer B Operation: Timer mode register B (TMB: $009) selects the auto-reload function, input clocksource, and prescaler divide ratio

Página 49

HD404818 Series50according to the value of timer load register C. If it is not selected, timer C goes to $00. The timer Cinterrupt request flag (IFTC:

Página 50

HD404818 Series51T × (TCR + 1)T × 256TT × (256 – TCR)TMC3 = 0T:TCR:Note: When TCR = $FF, this waveform is always fixed low.TMC3 = 1Input clock period

Página 51

HD404818 Series52Registers for TimersTimer Mode Register A (TMA: $008): Timer mode register A is a 4-bit write-only register whichcontrols the timer A

Página 52

HD404818 Series535. The division ratio must not be modified during time base mode operation, otherwise an overflowcycle error will occur.Timer Mode Re

Página 53

HD404818 Series54Table 23 Timer Mode Register CTMC3 Auto-Reload Function0No1 YesTMC2 TMC1 TMC0 Prescaler Divide Ratio, Clock Input Source00 0 ÷ 2048

Página 54

HD404818 Series55Table 24 PWM Output Following Update of Timer load RegisterPWM OutputModeTimer load Register is Updated duringHigh PWM OutputTimer

Página 55

HD404818 Series56Serial InterfaceThe serial interface transmits/receives 8-bit data serially. It consists of the serial data register, the serialmode

Página 56

HD404818 Series57Selection and Change of the Operation Mode: Table 25 shows the serial interface operation modeswhich are determined by a combination

Página 57

HD404818 Series4Pin ArrangementDRESETOSCOSCVVVCOM4VNUMGNUMONUMOCOM3COM2COM1D102CC321R2R2R2R3SEG2SEG3SEG4SEG5TIMO/R3INT /R3INT /R3SEG1SEG6SEG7SEG8R23

Página 58

HD404818 Series58(IFS ← 1)Octal counter = 000transmit clock disableSTS waiting stateTransmit clock8 external transmit clocksSTS instruction Transmit c

Página 59

HD404818 Series59Transmission finished(IFS ← 1)Disable interruptIFS ← 0Write to SMRIFS = 1 ?Normal endTransmit clockerror processingNoYesFigure 31 T

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HD404818 Series60Registers for Serial InterfaceSerial Mode Register (SMR: $005): The 4-bit write-only serial mode register controls the R00/SCK,presca

Página 61

HD404818 Series61PMRA3 PMRA2 PMRA1PMRA: $004SMR3 SMR2 SMR1 SMR0SMR: $005R02/SO pin mode selectionTransmit clock selectionR00/SCK pin mode selectionR

Página 62

HD404818 Series62LCD Controller/DriverThe MCU contains four common signal pins, the controller, and the driver. The controller and the driverdrive 32

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HD404818 Series63Bit 3 Bit 2 Bit 1 Bit 080818283848586878889909192939495$050$051$052$053$054$055$056$057$058$059$05A$05B$05C$05D$05E$05FCOM4 COM3 COM2

Página 64

HD404818 Series64Table 27 LCD Control RegisterLCRBIT 2Watch Mode/ Subactive ModeDisplayLCRBIT 1 Power Switch On/OffLCRBIT 0 Blank/ Display0 Off 0 Of

Página 65

HD404818 Series65Table 29 LCD Frame FrequencyLMRStatic Bit 3 Bit 2 Bit 3 Bit 2 Bit 3 Bit 2 Bit 3 Bit 2Instructioncycle time00011011CL0 CL1 CL2 CL3*1

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HD404818 Series66Large LCD Panel Driving and Driving Voltage (VLCD): When using a large LCD panel, lower thedividing resistance by attaching external

Página 67

HD404818 Series6732234323232VCCV2V3GNDV1COM1SEG1toSEG32VCCV2V3GNDV1COM1COM2SEG1toSEG32VCCV2V3GNDV1COM1toCOM3SEG1toSEG32VCCV2V3GNDV1COM1toCOM4SEG1toSEG

Página 68

HD404818 Series5Pin DescriptionPin Number Pin NumberFP-80B FP-80A, TFP-80 Pin Name I/O FP-80B FP-80A, TFP-80 Pin Name I/O179 D2I/O 31 29 R32/INT0I/O28

Página 69

HD404818 Series68Pin Description in PROM ModeThe HD4074818 and HD407L4818 are ZTAT microcomputers incorporating a PROM. In the PROMmode, the MCU does

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HD404818 Series69Pin NumberMCU Mode PROM Mode Pin Number MCU Mode PROM ModeFP-80BFP-80ATFP-80 Pin Name I/O Pin Name I/O FP-80BFP-80ATFP-80 Pin Name I/

Página 71

HD404818 Series70Programmable ROM OperationThe MCU on-chip PROM is programmed in PROM mode. PROM mode is set by pulling TEST, M0, andM1 low, and RESET

Página 72

HD404818 Series71Table 31 PROM Programmers and Socket AdaptersPROM Programmer Socket AdapterManufacturer Type Name Manufacturer Type Name Package Ty

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HD404818 Series72Addressing ModesRAM Addressing ModesAs shown in figure 39, the MCU has three RAM addressing modes: register indirect addressing, dire

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HD404818 Series73The P instruction has no effect on the program counter.AP9AP8AP7AP6AP5AP4AP3AP2AP1AP0W1W0X3X2X1X0Y3Y2Y1Y0W register X register Y regi

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HD404818 Series74d9d8d7d6d5d4d3d2d1d0Instruction 2nd wordOpcodeInstruction 1st word[JMPL][BRL][CALL]PC9PC8PC7PC6PC5PC4PC3PC2PC1PC0PCPCPCPC10111213Prog

Página 76

HD404818 Series75BR AAAAAA NOP256 (n – 1) + 255256nBR AAABR BBB256n + 254256n + 255256 (n + 1)BBB NOPFigure 41 Page Boundary between BR Instruction

Página 77

HD404818 Series76B1B0A3A2A1A0AccumulatorReferred ROM addressAddress DesignationRA9RA8RA7RA6RA5RA4RA3RA2RA1RA0RARARA10111213B2B3B register00P3P0[P]Inst

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HD404818 Series77Absolute Maximum RatingsHD404812, HD404814, HD404816, HD404818, and HD4074818 Absolute Maximum RatingsItem Symbol Value Unit NotesSup

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HD404818 Series6Pin Number Pin NumberFP-80B FP-80A, TFP-80 Pin Name I/O FP-80B FP-80A, TFP-80 Pin Name I/O61 59 SEG29 O 71 69 V362 60 SEG30 O 72 70 NU

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HD404818 Series78HD40L4812, HD40L4814, HD40L4816, HD40L4818, and HD407L4818 Absolute Maximum RatingsItem Symbol Value Unit NotesSupply voltage VCC–0.3

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HD404818 Series79Electrical Characteristics for Standard-VoltageHD404812, HD404814, HD404816, HD404818, and HD4074818 Electrical CharacteristicsDC Cha

Página 82

HD404818 Series80Item Symbol Pin Min Typ Max Unit Test Condition NotesCurrentdissipation inwatch mode(1)IWTC1VCC10 20 µAVCC = 5 V,LCD: OffCurrentdiss

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HD404818 Series81Input/Output Characteristics for Standard Pins (HD404812, HD404814, HD404816, HD404818: VCC= 4 to 6 V; HD4074818: VCC = 4 to 5.5 V;

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HD404818 Series82Input/Output Characteristics for High-Current Pins (HD404812, HD404814, HD404816, HD404818:VCC = 4 to 6 V; HD4074818: VCC = 4 to 5.5

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HD404818 Series83AC Characteristics (HD404812, HD404814, HD404816, HD404818: VCC = 4 to 6 V; HD4074818: VCC= 4 to 5.5 V; GND = 0 V, Ta = –20°C to +7

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HD404818 Series84Item Symbol Pin Min Typ Max Unit Test Condition NotesRESET highwidthtRSTHRESET 2 tcyc5InputcapacitanceCinD1015 pF f = 1 MHz, Vin = 0

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HD404818 Series85Serial Interface Timing CharacteristicsDuring Transmit Clock Output (HD404812, HD404814, HD404816, HD404818: VCC = 4 to 6 V;HD407481

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HD404818 Series86tCPrtCPfVCC – 0.5 V0.5 VOSC1tCPHtCPL1/fCPFigure 43 Oscillator Timing0.8VCC0.2VCCINT0, INT1tIHtILFigure 44 Interrupt TimingRESETtR

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HD404818 Series87Testpoint30 pFC12 kΩRVCCR = 2.6 kLΩ1S2074 Hor equivalentFigure 47 Timing Load Circuit

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HD404818 Series7Pin FunctionsPower SupplyVCC: Apply the VCC power supply voltage to this pin.GND: Connect to ground.TEST: For test purposes only. Conn

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HD404818 Series88Electrical Characteristics for Low-Voltage VersionsHD40L4812, HD40L4814, HD40L4816, HD40L4818, and HD407L4818 Electrical Characterist

Página 92

HD404818 Series89Item Symbol Pin Min Typ Max Unit Test Condition NotesCurrentdissipation inwatch mode(1)IWTC1VCC515 µAVCC = 3 V,LCD: OffCurrentdissip

Página 93

HD404818 Series90Input/Output Characteristics for Standard Pins (HD40L4812, HD40L4814, HD40L4816,HD40L4818: VCC = 2.7 to 6 V; HD407L4818: VCC = 3 to

Página 94

HD404818 Series91Input/Output Characteristics for High-Current Pins (HD40L4812, HD40L4814, HD40L4816,HD40L4818: VCC = 2.7 to 6 V; HD407L4818: VCC =

Página 95

HD404818 Series92AC Characteristics (HD40L4812, HD40L4814, HD40L4816, HD40L4818: VCC = 2.7 to 6 V;HD407L4818: VCC = 3 to 5.5 V; GND = 0 V, Ta = –20°

Página 96

HD404818 Series932. The oscillator stabilization time is the period from when VCC reaches 2.7 V (HD407L4818: VCC =3.0 V) at power-on until the oscill

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HD404818 Series94During Transmit Clock InputItem Symbol Pin(s) Min Typ Max Unit Test Condition NotesTransmit clock cycle time tScycSCK 1tcyc/tsubcyc1,

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HD404818 Series950.9V CC0.1V CCtDSOtSCKftSCKLtSSItHSItScyctSCKr0.4 V V – 1.0 VCCV – 1.0 V (0.9V )CC 0.4 V (0.1V )SCKSOSIAfter 8 pu

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HD404818 Series96Notes on ROM OutPlease pay attention to the following items regarding ROM out.On ROM out, fill the ROM area indicated below with 1s t

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HD404818 Series97HD404812, HD404814, HD404816, HD404818, HD40L4812, HD40L4814,HD40L4816, HD40L4818 Option List5-V operationLow-voltage operation5-V op

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