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Renesas PROM Programming Adapters PCA7438F-64A Especificações Página 10

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Rev.2.40 Jun 14, 2004 page 10 of 56
38C1 Group
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit and
the internal system clock selection bit.
The CPU mode register is allocated at address 003B16.
After system is released from reset, the on-chip oscillator mode is
selected, and the XIN–XOUT oscillation and the XCIN–XCOUT oscil-
lation are stopped.
Fig. 7 Structure of CPU mode register
N
ot ava
il
a
bl
e
P
rocessor mo
d
e
bi
ts
b1 b0
0 0 : Single-chip mode
0 1 :
1 0 :
1 1 :
Stack page selection bit
0 : 0 page
1 : 1 page
Main clock selection bit
0 : X
IN
input signal (X
IN
–X
OUT
oscillating)
1 : On-chip oscillator
(internal system clock: only frequency divided by 8 is valid.)
Port Xc switch bit
0 : I/O port function (Oscillation stop)
1 : X
CIN
–X
COUT
oscillating function
X
IN
–X
OUT
oscillation stop bit
0 : Oscillating
1 : Stopped
Main clock division ratio selection bit
(this bit is invalid when on-chip oscillator is selected.)
0 : f(X
IN
)/2 (high-speed mode)
1 : f(X
IN
)/8 (middle-speed mode)
Internal system clock selection bit
0 : Main clock selected (middle-/high-speed, on-chip oscillator mode)
1 : X
CIN
–X
COUT
selected (low-speed mode)
CPU
mo
d
e reg
i
ster
(CPUM
: a
dd
ress 003
B
16
,
i
n
i
t
i
a
l
va
l
ue: 68
16
)
b
7
b
0
Fig. 8 Switching method of CPU mode register
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Start with a on-chip oscillator.
Initial value of CPUM is 68
16
.
As for the details of condition for
transition among each mode,
refer to the state transition of system clock.
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.
When the low-, middle- or high-speed mode is used after the XIN–
XOUT oscillation and the XCIN–XCOUT oscillation are enabled, wait
in the on-chip oscillator mode until oscillation stabilizes, and then,
switch the operation mode.
When the middle- and high-speed mode are not used (XIN-XOUT
oscillation and external clock input are not performed), connect
XIN to VCC through a resistor.
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