Renesas Emulator System SH7362 Informações Técnicas descarregar pdf (Página 59)

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Table 2.12 Measurement Items (cont)

Classification Type Measurement Item Option Note

System bus

performance

(only available

for Ch3 and

Ch4)

System bus Number of requests RQ The number of valid bus cycles

(cells) is counted by the

system bus clock.

Number of

responses

RS The number of valid bus cycles

(cells) is counted by the

system bus clock.

Waited cycles for

request

WRQ The cycles for an issued

request (req), that no

acceptance signal (gnt) is

issued to, are counted by the

system bus clock.

Even if the waits are issued

simultaneously for multiple

requests, they are counted as

1.

Waited cycles for

response

WRS The cycles for an issued

response (r_req), that no

acceptance signal (r_gnt) is

issued to, are counted by the

system bus clock.

Even if the waits are issued

simultaneously for multiple

requests, they are counted as

1.

1 2 ... 54 55 56 57 58 59 60 61 62 63 64 65 66

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