74
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(2) Flash memory mode 2 (serial I/O mode)
The M38869FFAHP/GP has a function to serially input/output the
software commands, addresses, and data required for operation
on the internal flash memory (e. g., read, program, and erase) us-
ing only a few pins. This is called the serial I/O (input/output)
mode. This mode can be selected by driving the SDA (serial data
__
input/output), SCLK (serial clock input ), and OE pins high after
connecting wires as shown in Figures 72 and powering on the VCC
pin and then applying VPPH to the VPP pin.
In the serial I/O mode, the user can use six types of software com-
mands: read, program, program verify, erase, erase verify and
error check.
Serial input/output is accomplished synchronously with the clock,
beginning from the LSB (LSB first).
Fig. 72 Pin connection of M38869FFAHP/GP when operating in serial I/O mode
1 234 7891
01
11
21
31
41
51
61
71
81
92
056
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
3
4
3
5
3
6
3
7
3
8
3
9
4
0
4
14
24
34
44
54
64
74
84
95
05
15
25
35
45
55
65
75
85
96
0
6
1
6
2
6
3
6
4
6
5
6
6
6
7
6
8
6
9
7
0
7
1
7
2
7
3
7
4
7
5
7
6
7
7
7
8
7
9
8
0
P
30/
P
W
M0
P
31/
P
W
M1
P
62/
A
N2
P
61/
A
N1
P
60/
A
N0
P
77/
SC
L
P
76/
SD
A
P
75/
I
N
T4
1
P
74/
I
N
T3
1
P
72/
SC
L
K
2
P
71/
SO
U
T
2
P
70/
SI
N
2
P
57/
D
A2/
P
W
M1
1
P
50/
A0
P
45/
TXD
P
44/
RX
P
43/
I
N
T1/
O
B
F0
1
P
63/
A
N3
P
64/
A
N4
P
65/
A
N5
P
66/
A
N6
A
V
S
S
P
67/
A
N7
VR
E
F
VC
C
P
80/
D
Q0
P
81/
D
Q1
P
82/
D
Q2
P
83/
D
Q3
P
84/
D
Q4
P
85/
D
Q5
P
86/
D
Q6
P
87/
D
Q
P
42/
I
N
T0/
O
B
F0
C
N
VS
XI
N
XO
U
T
VS
S
R
E
S
E
P
73/
SR
D
Y
2/
I
N
T2
1
P
55/
C
N
T
R1
P
54/
C
N
T
R0
P
56/
D
A1/
P
W
M0
1
P
40/
XC
O
U
P
41/
XC
I
N
P
47/
SR
D
Y
1/
S1
P
52/
I
N
T3
0/
R
P
53/
I
N
T4
0/
W
P
51/
I
N
T2
0/
S0
P
34
P
35
P
00/
P
3R
E
F
P
04
P
05
P
06
P
07
P
11
P
12
P
13
P
14
P
15
P
16
P
17
P
26
P
25
P
24
P
23
P
22
P
21
P
20
P
10
P
01
P
02
P
32
P
33
P
36
P
37
P
03
P
27
P
46/
SC
L
K
1/
O
B
F1
0
M
3
8
8
6
9
F
F
A
H
P
M
3
8
8
6
9
F
F
A
G
P
V
p
p
O
E
V
s
s
V
c
c
S
D
A
B
U
S
Y
S
C
L
K
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*
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