Renesas 70 Informações Técnicas descarregar pdf (Página 5)

µ

PD70F3003A, 70F3025A, 70F3003A(A)

3

Data Sheet U13189EJ5V1DS

P40 to P47: Port 4

P50 to P57: Port 5

P60 to P63: Port 6

P70 to P77: Port 7

P90 to P96: Port 9

P110 to P117: Port 11

PWM0, PWM1: Pulse width modulation

RESET: Reset

R/W: Read/write status

RXD0, PXD1: Receive data

SCK0 to SCK3: Serial clock

SI0 to SI3: Serial input

SO0 to SO3: Serial output

TO110, TO111,

TO120, TO121,

TO130, TO131,

TO140, TO141: Timer output

TCLR11 to TCLR14: Timer clear

TI11 to TI14: Timer input

TXD0, TXD1: Transmit data

UBEN: Upper byte enable

WAIT: Wait

X1, X2: Crystal

V

DD: Power supply

V

PP:

Programming power supply

VSS: Ground

PIN NAMES

A16 to A19: Address bus

AD0 to AD15: Address/data bus

ADTRG: A/D Trigger input

ANI0 to ANI7: Analog input

ANO0, ANO1: Analog output

ASTB: Address strobe

AV

DD: Analog VDD

AVREF1 to AVREF3: Analog reference voltage

AV

SS: Analog VSS

CVDD:

Power supply for clock generator

CVSS: Ground for clock generator

CKSEL: Clock select

CLKOUT : Clock output

DSTB: Data strobe

HLDAK: Hold acknowledge

HLDRQ: Hold request

INTP110 to INTP113,

INTP120 to INTP123,

INTP130 to INTP133,

INTP140 to INTP143:

Interrupt request from peripherals

LBEN: Lower byte enable

MODE: Mode

NMI:

Non-maskable interrupt request

P00 to P07: Port 0

P10 to P17: Port 1

P20 to P27: Port 2

P30 to P37: Port 3

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