Renesas H8S/2378F Informações Técnicas Página 91

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7. Source Files of the Sample Program
This section describes main source files of the sample program.
7.1 Header Files
This sample program uses the following header files.
7.1.1 Bit Rate Setting (GenTest.h)
A bit rate is set.
/* 33MHz 9600bps */
//#define MA_BRR_SCI 0x6A /* Bit rate register channel 1 */
/* 8.25MHz 9600bps */
#define MA_BRR_SCI 0x1A /* Bit rate register channel 1 */
In the user program mode, communications between the connected device is performed at 9600 bps. For this reason, the
bit rate register (BRR) in the SCI module must be set according to the operating frequency. In this example, the
operating frequency is 8.25 MHz. To set 9600 bps, MA_BRR_SCI is set to 26 (0x1A). The relationships between
operating frequencies and BBR register settings is shown in
Table 7-1.
Table 7-1 Operating Frequencies and BBR Register Settings (When the Bit Rate Is 9600 (bit/s))
Operating Frequency φ (MHz) BRR Setting Error (%)
8 25 0.16
8.25 26 -0.54
9.8304 31 0.00
10 32 -1.36
12 38 0.16
12.288 39 0.00
14 45 -0.93
14.7456 47 0.00
16 51 0.16
17.2032 55 0.00
18 58 -0.69
19.6608 63 0.00
20 64 0.16
The MA_BRR_SCI value is set according to the operating frequency of the board and built with HEW to create a
program in an S-type file.
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