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3-71 M32R-FPU Software Manual (Rev.1.01)

MACWHIMACWHI

DSP function instruction

Multiply-accumulate

word and high-order halfword

[Mnemonic]

MACWHI Rsrc1,Rsrc2

[Function]

Multiply and add

accumulator += ( ( signed ) Rsrc1 * ( signed short ) ( Rsrc2 >> 16 ) );

[Description]

MACWHI multiplies the 32 bits of Rsrc1 and the high-order 16 bits of Rsrc2, then adds the

result to the low-order 56 bits in the accumulator.

The LSB of the multiplication result is aligned with the LSB of the accumulator, and the portion

corresponding to bits 8 through 15 of the accumulator is sign extended before addition. The

result of addition is stored in the accumulator. The 32 bits of Rsrc1 and the high-order 16 bits of

Rsrc2 are treated as signed values.

The condition bit (C) is unchanged.

[EIT occurrence]

None

[Encoding]

high-order 16 bits

Rsrc1

32 bits

Rsrc2

0151631

01516313247486378

Result of the multiplication

Value in accumulator before the

execution of the MACWHI instruction

Value in accumulator after the

execution of the MACWHI instruction

Sign extension

src10011 MACWHI Rsrc1,Rsrc2src20110

INSTRUCTIONS

3.2 Instruction description

1 2 ... 104 105 106 107 108 109 110 111 112 113 114 ... 193 194

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