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M32R-FPU Software Manual (Rev.1.01)

INSTRUCTIONS

3.2 Instruction description

FADDFADD

[Mnemonic]

FADD Rdest,Rsrc1,Rsrc2

[Function]

Floating-point add

Rdest = Rsrc1 + Rsrc2 ;

[Description]

Add the floating-point single precision values stored in Rsrc1 and Rsrc2 and store the result in

Rdest. The result is rounded according to the RM field of FPSR. The DN bit of FPSR handles the

modification of denormalized numbers. The condition bit (C) remains unchanged.

[EIT occurrence]

Floating-Point Exceptions (FPE)

• Unimplemented Operation Exception (UIPL)

• Invalid Operation Exception (IVLD)

• Overflow (OVF)

• Underflow (UDF)

• Inexact Exception (IXCT)

[Encoding]

floating-point Instructions

Floating-point add

[M32R-FPU Extended Instruction]

src11101 src20000 dest0000 00000000

FADD Rdest,Rsrc1,Rsrc2

1 2 ... 69 70 71 72 73 74 75 76 77 78 79 ... 193 194

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