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V850E2/MN4 Timer Array Unit Control

R01AN0922EJ0100 Rev.1.00 Page 15 of 54

Jan 13, 2012

4.4.3 TAUAn Control Registers

• TAUAn channel data register (TAUAnCDRm)

This register functions either as a compare register or a capture register, depending on the operation mode specified in

TAUAnCMORm.TAUAnMD[4:1].

In this sample program, the cycle of the PWM pulse is set in TAUA1CDR0 and the duty of the pulse is set in

TAUA1CDR1.

Figure 4.11 TAUAnCDRm Register Format

Setting example

TAUA1CDR0 = 4999; /* cycle of PWM */

TAUA1CDR1 = 4000; /* duty of PWM is 80%*/

1 2 ... 10 11 12 13 14 15 16 17 18 19 20 ... 56 57

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