
Pin Name
Input/
Functions
Output
V
CC, AVCC, Power source Apply voltage of 5 V ± 10 % to (typical) VCC and AVCC, and 0 V to VSS.
VSS
CNVSS CNVSS This is connected to VSS.
RESET Reset input Input To enter the reset state, the reset input pin must be kept at a LOW for 2 µs or more (under
normal V
CC conditions).
If more time is needed for the quartz-crystal oscillator to stabilize, this LOW condition should
be maintained for the required time.
X
IN Clock input Input This chip has an internal clock generating circuit. To control generating frequency, an
external ceramic resonator or a quartz-crystal oscillator is connected between pins X
IN and
X
OUT Clock output Output XOUT. If an external clock is used, the clock source should be connected to the XIN pin and
the XOUT pin should be left open.
P0
0
/PWM0–
I/O port P0 I/O Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually
P0
5
/PWM5,
programmed as input or output. At reset, this port is set to input mode. The output structure
P0
6
/INT2/AD4,
is N-channel open-drain output. (See note 1)
P0
7/INT1
PWM output Output Pins P0
0–P05 are also used as PWM output pins PWM0–PWM5 respectively. The output
structure is N-channel open-drain output.
External interrupt Input
Pins P0
6
and P0
7
are also used as INT external interrupt input pins INT2 and INT1 respectively.
input
Analog input Input P06 pin is also used as analog input pin AD4.
P1
0/OUT2, I/O port P1 I/O Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output
P11/SCL1,
structure is CMOS output. (See note 1)
P12/SCL2, OSD output Output Pins P10 is also used as OSD output pin OUT2. The output structure is CMOS output.
P1
3/SDA1, Multi-master I/O Pins P11–P14 are used as SCL1, SCL2, SDA1 and SDA2 respectively, when multi-master
P14/SDA2,
I
2
C-BUS interface I
2
C-BUS interface is used. The output structure is N-channel open-drain output.
P1
5
/AD1/INT3,
Analog input Input Pins P10, P15–P17 are also used as analog input pin AD8, AD1–AD3 respectively.
P1
6/AD2, External interrupt Input P15 pin is also used as INT external interrupt input pin INT3.
P17/AD3
input
P2
0/SCLK, I/O port P2 I/O Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output
P21/SOUT,
structure is CMOS output. (See note 1)
P2
2/SIN,
Serial I/O synchronous
I/O P20 pin is also used as serial I/O synchronous clock input/output pin SCLK. The output
P23/TIM3,
clock input/output port
structure is N-channel open-drain output.
P2
4/TIM2, Serial I/O data I/O P21 pin is also used as serial I/O data output pin SOUT. The output structure is open-drain
P25,
output output.
P26/OSC1/
Serial I/O data input
Input P22 pin is also used as serial I/O data input pin SIN.
X
CIN,
External clock Input Pins P2
3 and P24 are also used as timer external clock input pins TIM3 and TIM2
P27/OSC2/
input for timer respectively.
XCOUT
Clock input for OSD
Input P26 pin is also used as OSD clock input pin OSC1. (See note 2)
Clock output for OSD
Output P27 pin is also used as OSD clock input pin OSC2. The output structure is CMOS output.
(See note 2)
Sub-clock input Input P26 pin is also used as sub-clock input pin XCIN.
Sub-clock output Output P27 pin is also used as sub-clock output pin XCOUT.
7. PIN DESCRIPTION
Table 7.1 Pin Description
7
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.4
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