Renesas PROM Programming Adapter PCA7408 Manual do Utilizador descarregar pdf (Página 31)

M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP

Rev.1.00 Oct 01, 2002 page 31 of 110

REJ03B0134-0100Z

Function

In conformity with Philips I

C-BUS

standard:

10-bit addressing format

7-bit addressing format

High-speed clock mode

Standard clock mode

In conformity with Philips I

C-BUS

standard:

Master transmission

Master reception

Slave transmission

Slave reception

16.1 kHz to 400 kHz (at φ

= 4 MHz)

Table 8.6.1 Multi-master I

C-BUS Interface Functions

Item

Format

Communication mode

SCL clock frequency

: System clock = f(XIN)/2

Note : We are not responsible for any third party’s infringement of patent rights

or other rights attributable to the use of the control function (bits 6 and 7

of the I

C control register at address 00DA16) for connections between

the I

C-BUS interface and ports (SCL1, SCL2, SDA1, SDA2).

8.6 MULTI-MASTER I

C-BUS INTERFACE

The multi-master I

C-BUS interface is a serial communications cir-

cuit, conforming to the Philips I

C-BUS data transfer format. This

interface, offering both arbitration lost detection and a synchronous

functions, is useful for the multi-master serial communications.

Figure 8.6.1 shows a block diagram of the multi-master I

C-BUS in-

terface and Table 8.6.1 shows multi-master I

C-BUS interface func-

tions.

This multi-master I

C-BUS interface consists of the I

C address reg-

ister, the I

C data shift register, the I

C clock control register, the I

control register, the I

C status register and other control circuits.

Fig. 8.6.1 Block Diagram of Multi-master I

C-BUS Interface

C address register (S0D)

b7 b0

SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0

RBW

Noise

elimination

circuit

Serial

data

(SDA)

Address comparator

I C data shift register

Data

control

circuit

C clock control register (S2)

System clock

(φ)

Interrupt

generating

circuit

Interrupt

request signal

(IICIRQ)

MST TRX BB PIN

AL AAS AD0 LRB

I C status

(S1)

b7 b0

SEL1

SEL0

10BIT

SAD

ALS

BC2 BC1 BC0

C control register (S1D)

Bit counter

circuit

Clock

control

circuit

Noise

elimination

circuit

Serial

clock

(SCL)

b7 b0

ACK

BIT

FAST

MODE

CCR4 CCR3 CCR2 CCR1 CCR0

Internal data bus

Clock division

circuit

ESO

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 111 112

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