Renesas PROM Programming Adapter PCA7408 Manual do Utilizador descarregar pdf (Página 5)

M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP

Rev.1.00 Oct 01, 2002 page 5 of 110

REJ03B0134-0100Z

5. FUNCTIONAL BLOCK DIAGRAM

Fig. 5.1 Functional Block Diagram of M37221

OUT1

Clock input Clock output

OUT

Reset input

CNV

Clock output for display

Input ports P3

OSC1

OSC2

Clock input for display

INT2

INT1

PWM5

PWM4

PWM3

WM2

PWM1

PWM0

P5 (4)

YNC

A-D

comparator

14-bit

PWM circuit

8-bit PWM circuit

Accumulator

A (8)

Timer 4

T4 (8)

Timer 3

T3 (8)

Timer 2

T2 (8)

Timer 1

T1 (8)

Timer count source

selection circuit

TIM2

TIM3

Instruction

decoder

Control signal

OSD circuit

Stack

pointer

S (8)

Index

Y (8)

Index

X (8)

Processor

status

PS (8)

8-bit

arithmetic

and

logical unit

Program

counter

(8)

Program

counter

(8)

RAM

ROM

Data

bus

Clock

generating

circuit

RESET

Address bus

SI/O(8)

OUT

INT3

10 9 8 7

654

I/O port P0

2829 3031 32

3334

P1 (8

)

I/O port P1

1514 13 1211

3637

P2 (8

)

I/O port P2

I/O ports P3

–P3

17 2627

P3 (3

)

P0 (8

)

(

) Timing output

D-A

converter

(See note)

OUT2

Multi-master

I C-BUS

interface

ROM correction

function

D-A

Notes Only M37221EAS

P/FP h

as D-A converter.

Output ports P5

–P5

1 2 3 4 5 6 7 8 9 10 ... 111 112

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