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Target interface (SH7729) Jun. 30, 2009 (Second Edition)
SH7729
Applicable products PALMiCE3-SH / PALMiCE2-SH
Applicable connectors
(Connectors for debugger)
MIL connector (14-pin design)
MDR connector (36-pin design)
MIL connector
Signals
CPU Pin No. CPU Pin No. Pin
No.
Signal
Input/
Output
*1
FP-208C TBT-216B
Pin
No.
Signal
Input/
Output
*1
FP-208C TBT-216B
1 TCK Input 139 AH11 2 N.C.
3 TRST Input 136 AJ13 4
GND
(
ASEMD0)
*2
(Input) (127) (AH17)
5 TDO Output 120 AJ21 6 GND
7 ASEBRKAK Output 128 AJ17 8 VCC
*3
Output
9 TMS Input 137 AH12 10 GND
11 TDI Input 138 AJ12 12 GND
13 RESETP Output 193 K02 14 GND
For the pin where stated as N.C. in the table, leave the signal unconnected.
*1: Input/output is based on the target system.
*2: To debug,
ASEMD0 pin needs to be brought to Low state.
Shown in the target connection reference diagram is the circuit that brings ASEMD0 pin to Low state when you connect ASEMD0 signal to the connector for
debugger.
If you do not connect ASEMD0 signal to Pin No. 4 of the connector for debugger, the circuit that sets ASEMD0 pin by switch circuit will do. However, in such case,
do not connect ASEMD0 pin to Pin No. 4 of the connector for debugger, but connect Pin No. 4 of connector for the debugger to GND.
*3: For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C., however, by connecting I/O power, leak during
the target system power OFF can be prevented.
Target connection reference diagram
MIL connector specifications
Recommended connector
Manufacturer Omron Corporation
Model XG4C-1431
(Top view on the target board)
(For detailed dimensions of the connector,
refer to the documentation by manufacturer of the connector.)
*Please look at the pin configuration diagram above and make
sure that the connector is in the right direction before connecting.
Please check the pin number in the signal table above and make sure
the signal and the pin numbers match.
*1:
RESETP, which is connected to Pin No. 13 of the connector for debugger, is the signal that debugger uses for monitoring the state of RESETP
pin of CPU.
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