Renesas SuperH SH7343 Informações Técnicas descarregar pdf (Página 19)

Target interface (SH7083F/SH7084F/SH7085F/SH7086F) Aug. 2, 2010 (Third Edition)

MDR connector

Signals

CPU Pin No. CPU Pin No.

7083F 7084F

7085F

7086F

7083F 7084F

7085F

7086F

No.

Signal

Input/

Output

TQFP

-100

P-LBGA

-112

LQFP

-112

LQFP

-144

LQFP

-176

No.

Signal

Input/

Output

TQFP

-100

P-LBGA

-112

LQFP

-112

LQFP

-144

LQFP

-176

1 AUDCK Output 45 H7 53 65/109 89/133 2 GND

3 AUDATA0 Output 51 K10 60 72/116 97/140 4 GND

5 AUDATA1 Output 50 L10 59 70/115 95/139 6 GND

7 AUDATA2 Output 49 K9 58 69/114 93/138 8 GND

9 AUDATA3 Output 48 J8 57 68/113 92/137 10 GND

11 AUDSYNC Output 44 L8 52 64/100 88/124 12 GND

13 N.C. 14 GND

15 N.C. 16 GND

17 TCK Input 80 A9 89 143 1 18 GND

19 TMS Input 76 B10 85 138 172 20 GND

21 TRST Input 77 A10 86 139 174 22

GND

(ASEMD0 )

(Input) (27) (L2) (33) (42) (51)

23 TDI Input 78 D8 87 140 175 24 GND

25 TDO Output 79 B9 88 142 176 26 GND

ASEBRKAK

/ ASEBRK

Input/

Output

100 A2 102 144 2 28 GND

29 VCC

Output 30 GND

31 RES Output 75 C9 84 108 132 32 GND

33 GND 34 GND

35 N.C. 36 GND

・ For the pin where stated as N.C. in the table, leave the signal unconnected.

*1: Input/output is based on the target system.

*2: For SH7085F and SH7086F respectively, 2 routings of AUD ports are available. Choose either of the routings.

*3: To debug,

ASEMD0 pin needs to be brought to Low state.

Shown in the target connection reference diagram is the circuit that brings ASEMD0 pin to Low state when you connect ASEMD0 signal to the connector for

debugger.

If you do not connect ASEMD0 signal to Pin No. 22 of the connector for debugger, the circuit that sets ASEMD0 pin by switch circuit will do. However, in such

case, do not connect ASEMD0 pin to Pin No. 22 of the connector for debugger, but connect Pin No. 22 of connector for the debugger to GND.

*4: For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C., however, by connecting I/O power, leak during

the target system power OFF can be prevented.

Target connection reference diagram

MDR connector specifications

Recommended connector

Manufacturer 3M

Model 10236-52A2JL

(Top view on the target board)

(Side view on the target board)

(Pin Configuration)

(For detailed dimensions of the connector,

refer to the documentation by manufacturer of the connector.)

*Please look at the pin configuration diagram above and make

sure that the connector is in the right direction before connecting.

Please check the pin number in the signal table above and make sure

the signal and the pin numbers match.

*1:

RES, which is connected to Pin No. 31 of the connector for debugger, is the signal that debugger uses for monitoring the state of RES pin of

CPU.

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 203 204

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