Renesas User System Interface Board HS7047ECH61H Manual do Utilizador descarregar pdf (Página 135)

[R/W]: Whether an access was read (RD) or write (WR)

[SZ]: Selects the size of an access as B (byte), W (word), or L (longword).

[Status]: Bus state; DMA (internal DMAC/DTC execution cycle), AUD (AUD cycle), BRL

(user bus release), DAT (CPU data access cycle except for PC-relative data access),

IF (CPU instruction fetch cycle including PC-relative data access), or OTH (other

cases).

[Area]: Types of access areas; U32, U16, and U08 (32-, 16-, and 8-bit external memory area,

respectively), E32, E16, and E08 (32-, 16-, and 8-bit emulation memory area,

respectively), ROM, I/O, and RAM (on-chip ROM, on-chip I/O, and on-chip RAM,

respectively).

[Probes]: A 4-bit binary number showing the four probe pins in the order of Probe 4, Probe 3,

Probe 2, and Probe 1 from the left.

[NMI]: Status of NMI input signal

[IRQ]: Status of IRQ input signals

[Timestamp]: Time stamp of the record. Time stamps start from zero each time the user program is

executed. The minimum unit used in time measurement depends on the time stamp

clock rate selected in the [Trace Acquisition] dialog box.

[Source]: Source program of the executed instruction address

[Label]: Label information of the address (if defined)

[Timestamp-Difference]: Difference from the timestamp value shown on the previous line

It is possible to hide any column not necessary in the [Trace] window. Selecting a column you want to hide from

the popup menu displayed by clicking the right-hand mouse button on the header column hides that column. To

display the hidden column, select the column from the said popup menu again.

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Renesas User System Interface Board HS7047ECH61H Manual do Utilizador Página 135