
R8C/10 Group
Rev.1.20 Jan 27, 2006 page 33 of 180
REJ09B0019-0120
• Maskable Interrupt: An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or
whose interrupt priority can be changed by priority level.
• Non-maskable Interrupt: An interrupt which cannot be enabled (disabled) by the interrupt enable flag
(I flag) or whose interrupt priority cannot be changed by priority level.
Figure 10.1 Interrupts
Interrupt
Software
(Non-maskable interrupt)
Hardware
Special
(Non-maskable interrupt)
Peripheral function
(1)
(Maskable interrupt)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
Watchdog timer
Oscillation stop detection
Single step
(2)
Address match
NOTES:
1. Peripheral function interrupts are generated by the peripheral functions built in the microcomputer system.
2. Avoid using this interrupt because this is a dedicated interrupt for development support tools only.
10. Interrupt
10.1 Interrupt Overview
10.1.1 Type of Interrupts
Figure 10.1 shows types of interrupts.
10.1 Interrupt Overview
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