R8C/10 Group
Rev.1.20 Jan 27, 2006 page 48 of 180
REJ09B0019-0120
______ ______
10.2.3 INT1 Interrupt and INT2 Interrupt
______ ______
INT1 interrupts are triggered by INT1 inputs. The edge polarity is selected with the R0EDG bit in the
______
TXMR register. The INT1 pin is shared with the CNTR0 pin.
______ ______
INT2 interrupts are triggered by INT2 inputs. The edge polarity is selected with the R1EDG bit in the
______
TYZMR register. The INT2 pin is shared with the CNTR1 pin.
______ _____
Figure 10.13 shows the TXMR and TYZMR registers when using INT1 and INT2 interrupts.
______ ______
Figure 10.13 TXMR Register and TYZMR Register when INT1 and INT2 Interrupt Used
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Bit name
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INT1/CNTR
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switching bit
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0 : Stops counting
1 : Starts counting
Timer Z-related bit
Timer Y count
start flag
0
R
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R
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R
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R
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0 : Rising edge
1 : Falling edge
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10.2 INT Interrupt
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