Renesas R8C/Tiny Series Manual descarregar pdf (Página 56)

R8C/10 Group

Rev.1.20 Jan 27, 2006 page 46 of 180

REJ09B0019-0120

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10.2 INT Interrupt

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10.2.1 INT0 Interrupt

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INT0 interrupt is triggered by an INT0 input. When using INT0 interrupts, the INT0EN bit in the INTEN

Inputs can be passed through a digital filter with three different sampling clocks.

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The INT0 pin is shared with the external trigger input pin of Timer Z.

Figure 10.10 shows the INTEN and INT0F registers.

Figure 10.10 INTEN Register and INT0F Register

Bit name F

Bit symbol

5b4b

)

Set to “0”

)

Reserved bit

(

)

NOTES:

1. This bit must be set while the INT0STG bit in the PUM register is set to “0” (one-shot trigger disabled).

2. When setting the INT0PL bit to “1” (selecting both edges), the POL bit in the INT0IC must be set to “0”

(selecting falling edge).

3. The IR bit in the INT0IC register may be set to “1” (interrupt requested) when the INT0PL bit is rewritten.

Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.

Bit name F

INT0F0

b7 b6 b5 b4 b3 b2 b1 b0

Set to “0”Reserved bit

INT0 input filter select bit

Nothing is assigned.

When write, set to “0”. If read, it content is

indeterminate.

(b2)

(

)

0000

10.2 INT Interrupt

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