Renesas M16C/6NK Informações Técnicas descarregar pdf (Página 123)

Rev.2.10 Apr 14, 2006 page 99 of 378

REJ09B0124-0210

M16C/6N Group (M16C/6NK, M16C/6NM) 10. Interrupts

10.10 Address Match Interrupt

An address match interrupt request is generated immediately before executing the instruction at the

address indicated by the RMADi register (i = 0 to 3). Set the start address of any instruction in the RMADi

to enable or disable the interrupt. Note that the address match interrupt is unaffected by the I flag and IPL.

For address match interrupts, the value of the PC that is saved to the stack area varies depending on the

instruction being executed (refer to 10.5.7 Saving Registers). (The value of the PC that is saved to the

stack area is not the correct return address.) Therefore, follow one of the methods described below to

return from the address match interrupt.

• Rewrite the content of the stack and then use the REIT instruction to return.

• Restore the stack to its previous state before the interrupt request was accepted by using the POP or

similar other instruction and then use a jump instruction to return.

Table 10.6 shows the Value of PC that is Saved to Stack Area when Address Match Interrupt Request is

Accepted. Table 10.7 shows the Relationship between Address Match Interrupt Sources and Associated

Registers.

Note that when using the external bus in 8-bit width, no address match interrupts can be used for external

areas. (External bus is available Nomal-ver. only.)

Figure 10.16 shows Registers AIER, AIER2, and RMAD0 to RMAD3.

Table 10.6

Value of PC that is Saved to Stack Area when Address Match Interrupt Request is Accepted

Address Match Interrupt Sources

Address Match Interrupt Enable Bit Address Match Interrupt Register

Address match interrupt 0 AIER0 RMAD0

Address match interrupt 1 AIER1 RMAD1

Address match interrupt 2 AIER20 RMAD2

Address match interrupt 3 AIER21 RMAD3

Instruction at Address Indicated by RMADi Register

• 16-bit operation code instruction

• Instruction shown below among 8-bit operation code instructions

ADD.B:S #IMM8,dest SUB.B:S #IMM8,dest AND.B:S #IMM8,dest

OR.B:S #IMM8,dest MOV.B:S #IMM8,dest STZ.B:S #IMM8,dest

STNZ.B:S #IMM8,dest STZX.B:S #IMM81,#IMM82,dest

CMP.B:S #IMM8,dest PUSHM src POPM dest

JMPS #IMM8 JSRS #IMM8

MOV.B:S #IMM,dest (However, dest = A0 or A1)

Instructions other than the above

Value of PC that is saved to stack area: Refer to 10.5.7 Saving Registers.

Table 10.7 Relationship between Address Match Interrupt Sources and Associated Registers

Value of PC that is Saved to Stack Area

Address indicated by RMADi

1 2 ... 118 119 120 121 122 123 124 125 126 127 128 ... 411 412

Sem comentários

Renesas M16C/6NK Informações Técnicas Página 123