Renesas M16C/6NK Informações Técnicas descarregar pdf (Página 82)

Rev.2.10 Apr 14, 2006 page 58 of 378

REJ09B0124-0210

M16C/6N Group (M16C/6NK, M16C/6NM) 8. Clock Generation Circuit

Figure 8.2 CM0 Register

System Clock Control Register 0

(1)

NOTES:

1. Rewrite this register after setting the PRC0 bit in the PRCR register to 1 (write enabled).

2. The fC32 clock does not stop. In low-speed or low power dissipation mode, do not set this bit to 1 (peripheral

clock stops in wait mode).

3. The CM03 bit is set to 1 (high) while the CM04 bit is set to 0 (I/O port) or when entering stop mode.

4. To use a sub clock, set this bit to 1. Also make sure ports P8_6 and P8_7 are directed for input, with no

pull-ups.

5. This bit is provided to stop the main clock when the low power dissipation mode or on-chip oscillator low

power dissipation mode is selected. This bit cannot be used for detection as to whether the main clock stops

or not. To stop the main clock, set bits as follows:

(a) Set the CM07 bit to 1 (sub clock selected) or the CM21 bit in the CM2 register to 1 (on-chip oscillator

selected) with the sub clock stably oscillating.

(b) Set the CM20 bit in the CM2 register to 0 (oscillation stop, re-oscillation detection function disabled).

6. To use the main clock as the clock source for the CPU clock, set bits as follows:

(a) Set the CM05 bit to 0 (oscillate).

(b) Wait until the main clock oscillation stabilizes.

7. When the CM21 bit = 0 (on-chip oscillator stops) and the CM05 bit = 1 (main clock stops), the CM06 bit is

fixed to 1 (divide-by-8 mode) and the CM15 bit is fixed to 1 (drive capability high).

8. During external clock input, set the CM05 bit to 0 (oscillate).

9. When the CM05 bit is set to 1, the XOUT pin is held "H". Because the on-chip feedback resistor remains

connected, the XIN pin is pulled "H" to the same level as XOUT via the feedback resistor.

10. When entering stop mode from high-speed or medium-speed mode, on-chip oscillator mode or on-chip

oscillator low power dissipation mode, the CM06 bit is set to 1 (divide-by-8 mode).

11. After setting the CM04 bit to 1 (XCIN-XCOUT oscillator function), wait until the sub clock oscillates stably

before switching the CM07 bit from 0 to 1 (sub clock).

12. To return from on-chip oscillator mode to high-speed or medium-speed mode, set bits CM06 and CM15 to 1.

Bit Name FunctionBit Symbol

b1 b0

0 0 : I/O port P5_7

0 1 : Output fC

1 0 : Output f8

1 1 : Output f32

0 : Peripheral function clock does

not stop in wait mode

1 : Peripheral function clock stops

in wait mode

(2)

0 : I/O port P8_6, P8_7

1 : XCIN-XCOUT oscillation

function

(4)

0 : On

1 : Off

(8) (9)

0 : Bits CM16 and CM17 enabled

1 : Divide-by-8 mode

0 : Main clock, PLL clock,

or on-chip oscillator clock

1 : Sub clock

0 : LOW

1 : HIGH

CM07

CM05

CM04

CM01

CM02

CM00

CM06

Clock output function

select bits

(Valid only in single-chip

mode)

CM03

WAIT mode peripheral

function clock stop bit

Port XC select bit

(3)

Main clock stop bit

(5) (6) (7)

Main clock division select

bit 0

(7) (10) (12)

XCIN-XCOUT drive

capacity select bit

(3)

System clock select

bit

(6) (11)

Symbol Address After Reset

CM0 0006h 01001000b

b7 b6 b5 b4 b3 b2 b1 b0

1 2 ... 77 78 79 80 81 82 83 84 85 86 87 ... 411 412

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