Renesas M16C/6NK Informações Técnicas descarregar pdf (Página 391)

Rev.2.10 Apr 14, 2006 page 367 of 378

REJ09B0124-0210

M16C/6N Group (M16C/6NK, M16C/6NM) 23. Usage Notes

23.15 Programmable I/O Ports

_______

If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-phase

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output forcible cutoff by input on NMI pin enabled), pins P7_2 to P7_5, P8_0 and P8_1 go to a

high-impedance state.

Setting the SM32 bit in the S3C register to 1 causes the P9_2 pin to go to a high-impedance state.

Setting the SM42 bit in the S4C register to 1 causes the P9_6 pin to go to a high-impedance state

(1)

Setting the SM52 bit in the S5C register to 1 causes the P11_2 pin to go to a high-impedance state

(2)

Setting the SM62 bit in the S6C register to 1 causes the P11_6 pin to go to a high-impedance state

(2)

NOTES:

1. When using SI/O4, set the SM43 bit in the S4C register to 1 (SOUT4 output, CLK4 function) and the

port direction bit corresponding for SOUT4 pin to 0 (input mode).

2. The S5C and S6C registers are only in the 128-pin version. When using these registers, set these

registers after setting the PU37 bit in the PUR3 register to 1 (Pins P11 to P14 are usable).

The input threshold voltage of pins differs between programmable I/O ports and peripheral functions.

Therefore, if any pin is shared by a programmable I/O port and a peripheral function and the input level at

this pin is outside the range of recommended operating conditions VIH and VIL (neither “high” nor “low”),

the input level may be determined differently depending on which side—the programmable I/O port or the

peripheral function—is currently selected.

When changing the PD14_i bit (i = 0, 1) in the PC14 register from 0 (input port) to 1 (output port), follow the

procedures below (128-pin version only).

Setting Procedure

(1) Set P14_i bit :MOV.B #00000001b, PC14 ; P14_i bit setting

(2) Change PD14_i bit to 1 by MOV instruction :MOV.B #00110001b, PC14 ; Change to output port

Undefined values are read from bits P3_7 to P3_4, PD3_7 to PD3_4 by reading registers P3 and PD3

when bits PM01 to PM00 in the PM0 register are set to 01b (memory expansion mode) or 11b (microprocessor

mode) and setting the PM11 bit to 1.

Use the MOV instruction when rewriting registers P3 and PD3 (including the case that the size specifier is

“.W” and registers P2 and PD2 are rewritten) (Normal-ver. only).

When bits PM01 to PM00 are rewritten, “L” is output from pins P3_7 to P3_4 during 0.5 cycles of the BCLK

by setting bits PM01 to PM00 in the PM0 register to 01b (memory expansion mode) or 11b (microprocessor

mode) from 00b (single-chip mode) after setting the PM11 bit to 1 (Normal-ver. only).

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Renesas M16C/6NK Informações Técnicas Página 391